Patented Statistics building global embedded software
Statistical timing analysis tool helping designers of embedded systems to optimize the use of the hardware by the software
We provide statistical timing analysis of programs behavior on multicore processors for highly critical embedded system-based industries
With the empowerment of embedded systems requiring real-time capabilities through more advanced programs (AI notably) and hardware architecture, it is increasingly harder to ensure and to prove operational safety. By operational safety, we understand here that an embedded system does what it is designed to do within a given time and resource constraints. StatInf ensures such operational safety by using a statistical analysis of the execution of the programs on multicore microcontrollers
Measure software predictability and detect interferences on multicores processors
Optimize shorter development cycle
Make easier and safer the reassignment task for the developer
Unique composition method to determine Multicore impact
Secure AI programs requiring complex software level and operating systems
Automatic bounds estimation for WCET on functional execution with no code instrumentation needed
Drones & Aerospace
Saving energy and time consumption
Provide data for higher Certification level and reduce difficulty to justify it
Instantly analyze of the function trace execution whatever size and complexity of the application
Current challenges in designing Embedded Systems
Non-predictability of the programs on multicores processors
Long development cycle
Difficulty to build arguments justifying their solution wrt certification/normalisation
Arrival of AI programs requiring complex operating systems
The StatInf solution is based on a statistics-oriented patented technology which validates the design of embedded systems and ensures an important decrease of the development cycle and energy consumption, while connecting safeness and security in critical areas.
The solution is adapted for large programs on heterogeneous multicore processors, while validating changes within programs in a few minutes, even for programs for which the designers have no access to the code of programs.
By combining optimization and statistical methods, StatInf not only makes it possible to make predictable the use of multi-core in the critical ES but to reduce the development cycle, to safely introduce Artificial Intelligence into the control loop, to minimize energy consumption.
Architecture Processor Configuration
Learn more : https://twitter.com/ESABICNordFr/status/1372491420611850242?s=20
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